1. Field of the Invention
This disclosure relates to a method of forming a gate electrode, a method of manufacturing a semiconductor device having the gate electrode, and a method of oxidizing a substrate. More particularly, this disclosure relates to a method of forming a gate electrode having an improved sidewall profile, a method for manufacturing a semiconductor device having the gate electrode, and a method of oxidizing a substrate.
2. Description of the Related Art
Generally, semiconductor memory devices are classified as either volatile memory devices such as a dynamic random access memory (DRAM) or a static random access memory (SRAM), or non-volatile memory devices such as a read only memory (ROM). The volatile memory devices have rapid response speeds but data stored in the devices dissipate with time. On the other hand, the non-volatile memory devices have relatively slow response speeds but data stored in the devices are maintained.
Semiconductor memory devices have been highly integrated to fabricate many chips on one semiconductor memory device. Accordingly, a width of a pattern of the semiconductor memory devices or a distance between patterns of the semiconductor memory devices has been reduced. A width of a gate electrode of a transistor in a cell of the semiconductor memory devices or a distance between gate electrodes has also been reduced. Therefore, it has become increasingly difficult to obtain the required transistor characteristics for the semiconductor memory devices. Failures of the semiconductor memory devices increase when the series of processes for fabricating the semiconductor memory devices become more complex.
FIGS. 1A and 1B are cross-sectional diagrams illustrating a conventional method of forming a gate electrode of a cell transistor.
Referring to FIG. 1A, a gate structure 20 is formed on a semiconductor substrate 10. The gate structure 20 has a gate oxide film pattern 12, a polysilicon film pattern 14, a tungsten silicide film pattern 16, and a nitride film pattern 18.
Particularly, a thin gate oxide film having a thickness of about 30 to 200 Å is formed on the substrate 10, and a polysilicon film is formed on the gate oxide film using polysilicon doped with N-type or P-type impurities. A tungsten silicide film is formed on the polysilicon film, and a nitride film is formed on the tungsten silicide film.
After a photoresist pattern is formed on the nitride film, the nitride film, the tungsten silicide film, and the polysilicon film are etched using the photoresist pattern as an etching mask, thereby forming the nitride film pattern 18, the tungsten silicide film pattern 16, and the polysilicon film pattern 14 on the gate oxide film. Then, the photoresist pattern is removed using a plasma ashing process, a stripping process using sulfuric acid, and a cleaning process. When the photoresist pattern is removed with these processes, the gate oxide film exposed between the polysilicon film patterns 14 is removed from the substrate 10. Hence, the gate structure 20 is completed on the substrate 10.
Referring to FIG. 1B, the substrate 10, including the gate structure 20, is re-oxidized under an atmosphere including an oxygen gas so that an oxide film 22 is formed on a sidewall of the gate structure 20 and on the substrate 10.
The re-oxidizing process is executed to cure damages of the gate structure 20 and the substrate 10 caused by ions having high energies used during the etching process for gate structure 20. According to the re-oxidizing process, the oxygen gas reacts with silicon in the gate structure 20 and the substrate 10 so that the oxide film 22 is formed on the substrate 10 and on the sidewall of the gate structures 20.
The first oxide film 22 is formed on a sidewall of the polysilicon film pattern 14 and on a sidewall of the tungsten silicide film pattern 16. An oxidation rate of the tungsten silicide film pattern 16 is faster than that of the polysilicon film pattern 14. Hence, when the re-oxidation process is performed on the gate structure 20, a portion of the oxide film 22 (denoted by a circle A) formed on the sidewall of the tungsten silicide film pattern 16 is thicker than a portion of the oxide film 22 formed on the sidewall of the polysilicon film pattern 14. As a result, the gate structure 20 has a poor sidewall profile. In particular, the sidewall of the gate structure 20 has a negative slope where a portion of the oxide film 22 in the circle A protrudes in a horizontal direction.
In cases where the gate structure 20 has a sidewall with negative slope, an interlayer dielectric film may not completely fill the space between the gate structures 20 without generating a void therein. If voids are formed in the interlayer dielectric film, adjacent contacts may frequently connect with each other, causing an electrical failure between the contacts.
FIG. 2 is cross-sectional diagram illustrating a void generated in an interlayer dielectric film of a conventional semiconductor device and FIG. 3 is a plan diagram illustrating a failure of the conventional semiconductor device caused by the void in FIG. 2. FIG. 2 is a cross-sectional diagram of the void taken along the line B-B′ in FIG. 3.
Referring to FIGS. 2 and 3, a nitride spacer 24 is formed on a sidewall of a gate electrode in order to form a self-aligned contact hole. An interlayer dielectric film 26 is formed on the substrate 10 to cover the gate electrode including the nitride spacer 24. After the interlayer dielectric film 26 is etched to form the self-contact hole, the self-aligned contact hole is filled with a conductive material to form a self-contact 28. At this time, the conductive material also fills the void 30 generated in the interlayer dielectric film 26. Therefore, adjacent contacts 28 may be connected with each other through the conductive material filling the void 30, causing an electrical failure.
As for a re-oxidation process for a gate electrode, a method for preventing an excess oxidation of a tungsten silicide film is disclosed in Japanese Patent Laid-Open Publication No. 8-32066 or Japanese Patent Laid-Open Publication No. 11-345970.
In the Japanese Patent Laid-Open Publication No. 8-32066, after a polycide layer (including a polysilicon film and a tungsten silicide film) is etched to form a polycide film pattern, the polycide film pattern is thermally treated at a temperature of about 900° C. for about 60 minutes. Thus, an oxide film is formed on the polycide film pattern. Next, the polycide film pattern including the oxide film is thermally treated under an atmosphere including an oxygen gas and a nitrogen gas. However, because the tungsten silicide film is oxidized faster than the polysilicon film during the thermal treatment at the temperature of about 900° C. for about 60 minutes, an abnormal oxidation of the tungsten silicide film may not be sufficiently prevented.
According to the Japanese Patent Laid-Open Publication No. 11-345970, a polycide film (including a tungsten silicide film and a polysilicon film) is etched to form a polycide film pattern. After the polycide film pattern is given a primary thermal treatment under an atmosphere including an inert gas, it is then given a secondary thermal treatment under a strong oxygen atmosphere. However, during the secondary thermal treatment, the tungsten silicide film is oxidized faster than the polysilicon film. Thus, abnormal oxidation of the tungsten silicide film may not be effectively prevented.
Embodiments of the invention address these and other disadvantages of the prior art.